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<title>VPERM2I128 — Permute Integer Values </title></head>
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<h1>VPERM2I128 — Permute Integer Values</h1>
<table>
<tr>
<th>Opcode/Instruction</th>
<th>Op/En</th>
<th>64/32 -bit Mode</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>
<p>VEX.NDS.256.66.0F3A.W0 46 /r ib</p>
<p>VPERM2I128 <em>ymm1, ymm2, ymm3/m256, imm8</em></p></td>
<td>RVMI</td>
<td>V/V</td>
<td>AVX2</td>
<td>Permute 128-bit integer data in <em>ymm2</em> and <em>ymm3/mem</em> using controls from <em>imm8</em> and store result in <em>ymm1</em>.</td></tr></table>
<h3>Instruction Operand Encoding</h3>
<table>
<tr>
<td>Op/En</td>
<td>Operand 1</td>
<td>Operand 2</td>
<td>Operand 3</td>
<td>Operand 4</td></tr>
<tr>
<td>RVMI</td>
<td>ModRM:reg (w)</td>
<td>VEX.vvvv</td>
<td>ModRM:r/m (r)</td>
<td>Imm8</td></tr></table>
<h2>Description</h2>
<p>Permute 128 bit integer data from the first source operand (second operand) and second source operand (third operand) using bits in the 8-bit immediate and store results in the destination operand (first operand). The first source operand is a YMM register, the second source operand is a YMM register or a 256-bit memory location, and the destination operand is a YMM register.</p>
<p>Y1</p>
<p>Y0</p>
<p>SRC2</p>
<p>X1</p>
<p>X0</p>
<p>SRC1</p>
<p>X0, X1, Y0, or Y1</p>
<p>DEST</p>
<p>X0, X1, Y0, or Y1</p>
<h3>Figure 5-22.  VPERM2I128 Operation</h3>
<p>Imm8[1:0] select the source for the first destination 128-bit field, imm8[5:4] select the source for the second destination field. If imm8[3] is set, the low 128-bit field is zeroed. If imm8[7] is set, the high 128-bit field is zeroed.</p>
<p>VEX.L must be 1, otherwise the instruction will #UD.</p>
<h2>Operation</h2>
<p><strong>VPERM2I128</strong></p>
<pre>CASE IMM8[1:0] of
0: DEST[127:0] (cid:197) SRC1[127:0]
1: DEST[127:0] (cid:197) SRC1[255:128]
2: DEST[127:0] (cid:197) SRC2[127:0]
3: DEST[127:0] (cid:197) SRC2[255:128]
ESAC
CASE IMM8[5:4] of
0: DEST[255:128] (cid:197) SRC1[127:0]
1: DEST[255:128] (cid:197) SRC1[255:128]
2: DEST[255:128] (cid:197) SRC2[127:0]
3: DEST[255:128] (cid:197) SRC2[255:128]
ESAC
IF (imm8[3])
DEST[127:0] (cid:197) 0
FI
IF (imm8[7])
DEST[255:128] (cid:197) 0
FI</pre>
<h2>Intel C/C++ Compiler Intrinsic Equivalent</h2>
<p>VPERM2I128: __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, int control)</p>
<h2>SIMD Floating-Point Exceptions</h2>
<p>None</p>
<h2>Other Exceptions</h2>
<p>See Exceptions Type 6; additionally</p>
<table class="exception-table">
<tr>
<td>#UD</td>
<td>
<p>If VEX.L = 0,</p>
<p>If VEX.W = 1.</p></td></tr></table></body></html>